EC8552 MCQ TEST – COMPUTER ARCHITECTURE EC8552 IMPORTANT MODEL TEST

EC8552 MCQ TEST – COMPUTER ARCHITECTURE EC8552 IMPORTANT MODEL TEST

Welcome to your EC8552 MCQ TEST - COMPUTER ARCHITECTURE EC8552 IMPORTANT MODEL TEST

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The amount of ROM needed to implement a 4 bit multiplier is?
Register renaming is done in pipelined processors?
Consider the data given in previous question. The size of the cache tag directory is ?
Consider the data from above question. When there is a miss in both L1 cache and L2 cache, first a block is transferred from main memory to L2 cache, and then a block is transferred from L2 cache to L1 cache. What is the total time taken for these transfers?
Which of the following are NOT true in a pipelined processor?
The use of multiple register windows with overlap causes a reduction in the number of memory accesses for?
In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is?
The cache hit ratio for this initialization loop is?
Which one of the following is true for a CPU having a single interrupt request line and a single interrupt grant line?
The performance of a pipelined processor suffers if?
More than one word are put in one cache block to?
Where does the swap space reside?
Which of the following DMA transfer modes and interrupt handling mechanisms will enable the highest I/O band-width?
Which of the following statements about relative addressing mode is FALSE?
Which of the following addressing modes permits relocation without any change whatsoever in the code?
Which of the following is true?
Relative mode of addressing is most relevant to writing?
For the daisy chain scheme of connecting I/O devices, which of the following statement is true?
Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations ?
Relative mode of addressing is most relevant to writing?
The minimum time delay between the initiation of two independent memory operations is called?
The register that stores the bits required to mask the interrupts is ______?
In ______ addressing mode, the operands are stored in the memory. The address of the corresponding memory location is given in a register which is specified in the instruction?
The _____ addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction?
In _____ method, the word is written to the block in both the cache and main memory, in parallel?
A CPU handles interrupt by executing interrupt service subroutine __________?
The device which is used to connect a peripheral to bus is known as?
The Memory Address Register?
More than one word are put in one cache block to?
In comparison with static RAM memory, the dynamic Ram memory has?
In the Big-Endian system, the computer stores?
Temporal cohesion means?
Various storage devices used by an operating system can be arranged as follows in increasing order of accessing speed?
Of the following, which best characterizes computers that use memory-mapped I/O?
Which of the following mapping is not used for mapping process in cache memory?
Suppose a processor does not have any stack pointer register. Which of the following statements is true?
A processor needs software interrupt to?
A CPU has two modes-privileged and non-privileged. In order to change the mode from privileged to non-privileged?
In 2' s complement addition, overflow?
In the absolute addressing mode?
The performance of a pipelined processor suffers if?
Which of the following addressing modes are suitable for program relocation at run time?
More than one word is put in one cache block to?
Consider the following processor design characteristics. I. Register-to-register arithmetic operations only II. Fixed-length instruction format III. Hardwired control unit Which of the characteristics above are used in the design of a RISC processor?
SIMD represents an organization that ?
Floating point representation is used to store?
In computers, subtraction is generally carried out by?
The average time required to reach a storage location in memory and obtain its contents is called the?
The idea of cache memory is based?
Which of the following is lowest in memory hierarchy?
The circuit used to store one bit of data is known as?
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