EC8552 COMPUTER QUIZ – IV UNIT MEMORY & I/O ORGANIZATION CAO ONLINE QUIZ October 14, 2020 admin 1 Comment EC8552 COMPUTER QUIZ – IV UNIT MEMORY & I/O ORGANIZATION CAO ONLINE QUIZ Welcome to your COMPUTER QUIZ – EC8552 IV UNIT MEMORY & I/O ORGANIZATION CAO ONLINE QUIZ Your Name Your Email What is the high speed memory between the main memory and the CPU called?Register MemoryCache MemoryStorage MemoryVirtual Memory Whenever the data is found in the cache memory it is called as?Cache HitCache FoundCache MissCache Error When the data at a location in cache is different from the data located in the main memory, the cache is called?UniqueInconsistentVariableFault Which of the following is not a write policy to avoid Cache Coherence?Write throughWrite withinWrite backBuffered write Which of the following is an efficient method of cache updating?Snoopy writesWrite throughWrite withinBuffered write In ____________ mapping, the data can be mapped anywhere in the Cache Memory?AssociativeDirectSet AssociativeIndirect The transfer between CPU and Cache is?Block transferWord transferSet transferAssociative transfer The reason for the implementation of the cache memory is ?To increase the internal memory of the systemThe difference in speeds of operation of the processor and memoryTo reduce the memory access and cycle timeAll of the mentioned The effectiveness of the cache memory is based on the property of ?Locality of referenceMemory localisationMemory sizeNone of the mentioned The temporal aspect of the locality of reference means?That the recently executed instruction won’t be executed soonThat the recently executed instruction is temporarily not referencedThat the recently executed instruction will be executed soon againNone of the mentioned The spatial aspect of the locality of reference means?That the recently executed instruction is executed again nextThat the recently executed won’t be executed againThat the instruction executed will be executed at a later timeThat the instruction in close proximity of the instruction executed will be executed in future The correspondence between the main memory blocks and those in the cache is given by ?Hash functionMapping functionLocale functionAssign function The algorithm to remove and place new contents into the cache is called?Replacement algorithmRenewal algorithmUpdationNone of the mentioned The write-through procedure is used?To write onto the memory directlyTo write and read from memory simultaneouslyTo write directly on the memory and the cache simultaneouslyNone of the mentioned The bit used to signify that the cache location is updated is?Dirty bitUpdate bitReference bitFlag bit The copy-back protocol is used?To copy the contents of the memory onto the cacheTo update the contents of the memory from the cacheTo remove the contents of the cache and push it on to the memoryNone of the mentioned The approach where the memory contents are transferred directly to the processor from the memory is called?Read-laterRead-throughEarly-startNone of the mentioned Memory unit accessed by content is called?Read only MemoryProgrammable MemoryVirtual MemoryAssociative Memory The performance of cache memory is frequently measured in terms of a quantity called?Miss ratioHit ratioLatency ratioRead ratio The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache accommodate?256 words512 words1024 words128 words A page fault?Occurs when there is an error in a specific pageOccurs when a program accesses a page of main memoryOccurs when a program accesses a page not currently in main memoryOccurs when a program accesses a page belonging to another program If a block can be placed at every location in the cache, this cache is said to be?Indirectly mappedDirectly mappedFully associativePartially associative The information when is written in the cache, both to the block in the cache and the block present in the lower-level memory, refers to?Miss rateWrite-backWrite-throughDirty bit Average access time of memory for having memory-hierarchy performance is given as?Average memory access time = Hit time + Miss rateAverage memory access time = Hit time + Miss rateAverage memory access time = Hit time + Miss rate + Miss penaltyAverage memory access time = Hit time + Miss rate - Miss penalty As segment or a page is normally used for block, page-fault and the address-fault is used for?HitMissCacheStack The block frame address are divided into the?Tag fieldIndex fieldStack fieldBoth a and b The victim buffer's performance and the operation is almost similar to?Write bufferRead bufferWrite-throughRead through The virtual memory producing the virtual-addresses, are translated by?Logical addressesLocal addressesPhysical addressesAll above Per memory reference, the miss-rate can be turned into the per instruction misses rate by?Miss rate= Memory accesses/ instructionsMiss rate= Memory accesses* instructionsMiss rate= Memory accesses-instructionsMiss rate= Memory accesses+ instructions Address translation cache is referred to as a?RephrasingCache bufferTranslation bufferRelocation Time is Up! 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