COMPUTER QUIZ – EC8552 IV UNIT MEMORY & I/O ORGANIZATION CAO ONLINE QUIZ October 10, 2020 admin Leave a comment Welcome to your COMPUTER QUIZ – EC8552 IV UNIT MEMORY & I/O ORGANIZATION CAO ONLINE QUIZ Your Name Your Email What is the high speed memory between the main memory and the CPU called? Register Memory Cache Memory Storage Memory Virtual Memory Whenever the data is found in the cache memory it is called as? Cache Hit Cache Found Cache Miss Cache Error When the data at a location in cache is different from the data located in the main memory, the cache is called? Unique Inconsistent Variable Fault Which of the following is not a write policy to avoid Cache Coherence? Write through Write within Write back Buffered write Which of the following is an efficient method of cache updating? Snoopy writes Write through Write within Buffered write In ____________ mapping, the data can be mapped anywhere in the Cache Memory? Associative Direct Set Associative Indirect The transfer between CPU and Cache is? Block transfer Word transfer Set transfer Associative transfer The reason for the implementation of the cache memory is ? To increase the internal memory of the system The difference in speeds of operation of the processor and memory To reduce the memory access and cycle time All of the mentioned The effectiveness of the cache memory is based on the property of ? Locality of reference Memory localisation Memory size None of the mentioned The temporal aspect of the locality of reference means? That the recently executed instruction won’t be executed soon That the recently executed instruction is temporarily not referenced That the recently executed instruction will be executed soon again None of the mentioned The spatial aspect of the locality of reference means? That the recently executed instruction is executed again next That the recently executed won’t be executed again That the instruction executed will be executed at a later time That the instruction in close proximity of the instruction executed will be executed in future The correspondence between the main memory blocks and those in the cache is given by ? Hash function Mapping function Locale function Assign function The algorithm to remove and place new contents into the cache is called? Replacement algorithm Renewal algorithm Updation None of the mentioned The write-through procedure is used? To write onto the memory directly To write and read from memory simultaneously To write directly on the memory and the cache simultaneously None of the mentioned The bit used to signify that the cache location is updated is? Dirty bit Update bit Reference bit Flag bit The copy-back protocol is used? To copy the contents of the memory onto the cache To update the contents of the memory from the cache To remove the contents of the cache and push it on to the memory None of the mentioned The approach where the memory contents are transferred directly to the processor from the memory is called? Read-later Read-through Early-start None of the mentioned Memory unit accessed by content is called? Read only Memory Programmable Memory Virtual Memory Associative Memory The performance of cache memory is frequently measured in terms of a quantity called? Miss ratio Hit ratio Latency ratio Read ratio The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache accommodate? 256 words 512 words 1024 words 128 words A page fault? Occurs when there is an error in a specific page Occurs when a program accesses a page of main memory Occurs when a program accesses a page not currently in main memory Occurs when a program accesses a page belonging to another program If a block can be placed at every location in the cache, this cache is said to be? Indirectly mapped Directly mapped Fully associative Partially associative The information when is written in the cache, both to the block in the cache and the block present in the lower-level memory, refers to? Miss rate Write-back Write-through Dirty bit Average access time of memory for having memory-hierarchy performance is given as? Average memory access time = Hit time + Miss rate Average memory access time = Hit time + Miss rate Average memory access time = Hit time + Miss rate + Miss penalty Average memory access time = Hit time + Miss rate - Miss penalty As segment or a page is normally used for block, page-fault and the address-fault is used for? Hit Miss Cache Stack The block frame address are divided into the? Tag field Index field Stack field Both a and b The victim buffer's performance and the operation is almost similar to? Write buffer Read buffer Write-through Read through The virtual memory producing the virtual-addresses, are translated by? Logical addresses Local addresses Physical addresses All above Per memory reference, the miss-rate can be turned into the per instruction misses rate by? Miss rate= Memory accesses/ instructions Miss rate= Memory accesses* instructions Miss rate= Memory accesses-instructions Miss rate= Memory accesses+ instructions Address translation cache is referred to as a? Rephrasing Cache buffer Translation buffer Relocation Time is Up!